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General information about logic analysis

A logic analyzer (brief referred to as LA) usually records only digital channels. This, however, with a high memory depth (often 4kBit/channel or expensive equipment 128Kbit/Kanal in depth) and high speeds. Similar to an oscilloscope, a LA also offers the possibility of triggering, and a variable time basis.

The following features characterize a logic analyzer:

The number of input channels:

An LA has (usually defined by the architecture of memory chips), a channel number as a multiple of 8. LA's are often available with 16, 24 or 32 channels. More channels are less frequently needed (64 or 80 channels, or even 128 and more).
The required number of channels depends on the nature of the problem, which is to be analyzed with an LA.
Most time, just 8 or 16 recording channels required to measure the state of digital circuits. If signals of processors are going to be analysed, then 16 channels are at least required. This is adequate for simple problems, often because many control lines, and some address lines may be recorded. But if an 8-bit processor should be fully recorded, 32 channels are required. These 16 address lines, 8 data lines and 8 control lines can be recorded. Even some 16-bit processors with multiplexed address / data bus can be recorded with 32 channels. For addresses and data, only 16 (or 24) lines are needed. For control cables 16 (or 8) channels are still needed.

Sample Rate:

Another important point in an LA is the sampling rate, which indicates the number of measurements per second. A sampling rate of 100 MSamples / sec does 100 million measurements per seconds. This corresponds to a logicanalyzer resolution of 10 ns (1 / f = T f = 100 MHz => T = 1 / 100 MHz = 10 * 10-9 s = 10 ns). Simultaneous sampling is done every 10 ns on all channels and stored in one of LA's fast RAM cache.
The LA has a sampling rate that can actually analyze PC expansion cards. Since a chip select on a PC often persists 400 ns or longer, a sampling rate of 100 MS / s will give, approximately 40 measurements/samples (with 100 MS / s the time between two samples is 10 ns, representing a single measurement, so 40 measurements with 10 ns spacing covers a time span of 400 ns). This is sufficient to analyze any errors or problems with PC expansion cards.

Timing and State mode:

The nature of the recording of LA's can be divided into two distinct categories:

• Timing Mode:

In this mode, the LArecorded the signals with a constant frequency. This is needed if the time characteristics should be considered and analyzed. This synchronous recording is controlled by a constant internal frequency. The sampling clock is adjustable beginning with 100 Hz up to a high MHz values, allowing to record slow but also very fast state changes. So the term "timing" means that time (time length and time differences) can be measured.

• State mode:

The signals to be measured are recorded using an external clock. In doing so, the signal states are recorded during the state change of the device under test (the external clock). Time distances can not be determined, but the resulting advantage is a very effective usage of the LA's memory, since only one state for each new record is needed.

Sequence control of the LA's with the trigger:

A logic analyzer takes a lot of data simultaneously with a high memory depth, so that even complete program sections can be recorded to examine a microprocessor. An essential point while working with LA's is the moment of the recording. This is achieved by the triggering.
A simple way to build a trigger is to give a bit combination that should be true as valid trigger condition. Therefore the values for each channel may be set to 0 (low), 1 (high) or X (ignore this channel).
If e.g. a 8 bit counter is connected to the LA and the trigger configuration is set to 0 for the first 8 channels and X (don't care) for the remaining channels, then the recording starts when the counter reaches 0 (trigger condition true). The moment at which every condition is true is called trigger event.

What is a pre-trigger?

Furthermore, consider recording data ahead of the trigger moment, since these data can also be very important for subsequent analysis. This is called pre-triggering. Values like 1/8 pre-trigger may bet set. This means that an LA with 32768 bits per channel as memory space will record 4096 bits ahead of the trigger time. Recording continues and fills up the remaining 28,672 bits after the trigger time. Possible settings of the pre-trigger are 1/8, 2/8 ... 7/8.
Example: To analyse a device under test having an error that appears during a particular event, the trigger conditions should be apropriately adjusted to this event. Using the pre-trigger, the states ahead and after this event are recorded and thus analyzable.